Joseph J. Rumpler IIJoseph J.Rumpler II
Of Counsel, Intellectual Property
Joseph Rumpler is of counsel in the Litigation Department of Paul Hastings and is based in the firm’s Palo Alto office. His practice focuses on intellectual property matters with an emphasis on patent litigation. Prior to becoming an attorney, Joseph spent five years working as technical advisor in patent litigation matters.
Joseph was previously a researcher and engineer, primarily in the semiconductor field, and has nearly a decade of hands-on semiconductor fabrication experience gained at the Massachusetts Institute of Technology and Intel Corporation.
Defendant Samsung Electronics in patent litigation in the Eastern District of Texas involving memory architecture and applications processors for mobile devices.
Defendant Samsung Electronics in patent litigation in the District of Delaware involving semiconductor memory manufacturing processes.
U.S. Patent No. 9,071,030, Highly Integrable Semiconductor Device.
SEPTEMBER 14, 2026
U.S. Patent No. 8,409,888, Highly Integrable Edge Emitting Active Optical Device and a Process Technology for the Manufacture of the Same.
SEPTEMBER 14, 2026
Continuous-Wave Electrically Pumped 1.55 um Edge-Emitting Platelet Ridge Laser Diodes on Silicon, IEEE Photonics Technology Letters, vol. 21, no. 13, pp. 827-29, Author
2009
Use of Patterned Magnetic Films to Retain and Orient Micro-Components During Fluidic Assembly, Journal of Applied Physics, vol. 105, no. 7, pp. 07C1231-33, Author
2009
Recess Integration of Micro-Cleaved Laser Diode Platelets with Dielectric Waveguides on Silicon, Proceedings of the SPIE on Novel In-Plane Semiconductor Lasers VII, vol. 6909, pp. 0O1-O8, Author
2008
Coaxial Integration of Micro-Cleaved Ridge Waveguide Gain Elements with SiOxNy Waveguides on Silicon, Proceedings of the Workshop on Compound Semiconductor Devices and Integrated Circuit Engineering, Author
2007
Precision Micro-Cleaving of 1.55 µm Laser Diode Platelets for Integration with Dielectric Waveguides on Silicon Integrated Circuit Wafers, Proceedings of the Conference on Indium Phosphide and Related Materials, pp. 374-76, Author
2006
Optoelectronic Integration using Statistical Assembly and Magnetic Retention of Heterostructure Pills, Proceedings of the Conference on Lasers and Electro-Optics (CLEO), vol. 2, paper CThT2, Author
2004
Development of RM3 Technology to Integrate P-i-N Photodiodes on Si-CMOS for Optical Clock Distribution, Proc. of the Int’l Conf. on Compound Semiconductor Manufacturing Technology, Author
2004