Image: Joseph J. Rumpler II

Joseph J. Rumpler II

Of Counsel, Litigation Department


Joseph Rumpler is Of Counsel in the Litigation practice of Paul Hastings and is based in the firm’s Palo Alto office. His practice focuses on intellectual property matters with an emphasis on patent litigation. Prior to becoming an attorney, Dr. Rumpler spent five years working as technical advisor in patent litigation matters.

Before that, Dr. Rumpler was a researcher and engineer, primarily in the semiconductor field. Dr. Rumpler has nearly a decade of hands-on semiconductor fabrication experience gained at the Massachusetts Institute of Technology and Intel Corporation. 


At MIT, Dr. Rumpler was a research assistant in the Microsystems Technology Laboratory and the Center for Integrated Photonic Systems. There, his focus was on the fabrication and integration of compound semiconductor light emitting diodes and lasers on Silicon substrates. As part of this effort, he designed and executed novel fabrication processes to manufacture Indium Phosphide based edge-emitting lasers and Gallium Arsenide based light emitting diodes for integration with Silicon CMOS electronics technology. Also, he served as the lead teaching assistant for MIT’s advanced semiconductor fabrication laboratory course.

At Intel, Dr. Rumpler was a Senior Engineer developing tools for semiconductor circuit characterization and a member of the Semiconductor Process Integration group starting up new manufacturing processes in the high volume fabrication facility. In addition to his decade of experience in the semiconductor field, Dr. Rumpler also developed computer models for electromagnetics and quantitative algorithmic financial trading systems.

Dr. Rumpler is admitted to practice in California and Ohio. He is also registered to practice before the United States Patent and Trademark Office.


  • Stanford Law School, J.D., 2013 (Editor, Stanford Technology Law Review)
  • Massachusetts Institute of Technology (MIT), Ph.D., Electrical Engineering, 2008
  • Massachusetts Institute of Technology (MIT), S.M., Electrical Engineering and Computer Science, 2002
  • University of Illinois, B.S., Electrical Engineering, 2000 (highest honors)
  • Miami University, B.S., Engineering Physics, 1999 (summa cum laude)


  • Defendant Samsung Electronics in patent litigation in the Eastern District of Texas involving memory architecture and applications processors for mobile devices.
  • Defendant Samsung Electronics in patent litigation in the District of Delaware involving semiconductor memory manufacturing processes.
  • Defendant Samsung Electronics in patent litigation in the Northern District of Illinois involving integrated circuits for memory.
  • Defendant Moser Baer India Ltd. in patent litigation in the District of Minnesota involving CD/DVD technology
  • Leading global semiconductor company in licensing negotiations involving portfolios of semiconductor manufacturing patents.
  • Defendant Lehman Brothers, Inc. in patent litigation in the Northern District of Illinois involving automated securities trading systems.
  • Defendants Barclays Capital Inc., Barclays Bank PLC, UBS AG, UBS Financial Services, Inc., and UBS Securities LLC in patent litigation in the Northern District of Illinois involving automated securities trading systems.
  • Defendant Apple Inc. in patent litigation in the Eastern District of Texas involving mobile phone and handheld computing technologies.
  • Defendant Apple Inc. in patent litigation in the Eastern District of Texas involving various mobile device features and functionality.

Engagement & Publications

Dr. Rumpler widely attended semiconductor conferences as a researcher and published in leading journals. Representative publications include:

  • Continuous-Wave Electrically Pumped 1.55 um Edge-Emitting Platelet Ridge Laser Diodes on Silicon, IEEE Photonics Technology Letters, vol. 21, no. 13, pp. 827-29 (2009).
  • Use of Patterned Magnetic Films to Retain and Orient Micro-Components During Fluidic Assembly, Journal of Applied Physics, vol. 105, no. 7, pp. 07C1231-33 (2009).
  • Recess Integration of Micro-Cleaved Laser Diode Platelets with Dielectric Waveguides on Silicon, Proceedings of the SPIE on Novel In-Plane Semiconductor Lasers VII, vol. 6909, pp. 0O1-O8 (2008).
  • Coaxial Integration of Micro-Cleaved Ridge Waveguide Gain Elements with SiOxNy Waveguides on Silicon, Proceedings of the Workshop on Compound Semiconductor Devices and Integrated Circuit Engineering (2007).
  • Precision Micro-Cleaving of 1.55 µm Laser Diode Platelets for Integration with Dielectric Waveguides on Silicon Integrated Circuit Wafers, Proceedings of the Conference on Indium Phosphide and Related Materials, pp. 374-76 (2006).
  • Optoelectronic Integration using Statistical Assembly and Magnetic Retention of Heterostructure Pills, Proceedings of the Conference on Lasers and Electro-Optics (CLEO), vol. 2, paper CThT2 (2004).
  • Development of RM3 Technology to Integrate P-i-N Photodiodes on Si-CMOS for Optical Clock Distribution, Proc. of the Int’l Conf. on Compound Semiconductor Manufacturing Technology (2004).
  • U.S. Patent No. 9,071,030, Highly Integrable Semiconductor Device.
  • U.S. Patent No. 8,409,888, Highly Integrable Edge Emitting Active Optical Device and a Process Technology for the Manufacture of the Same.

Practice Areas


Patent Litigation

IP Transactions and Licensing

ITC Section 337 Investigations


Intellectual Property




Ohio Bar

California Bar

United States Patent & Trademark Office


Stanford Law School, J.D. 2013

Massachusetts Institute of Technology, Ph.D. 2008

Massachusetts Institute of Technology, S.M. 2002

University of Illinois at Urbana-Champaign, B.S. 2000

Miami University, B.S. 1999

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